Dr.-Ing. Florian Haas
Phone: | +49 821 598 - 2393 |
Fax: | +49 821 598 - 2359 |
Email: | haas@es-augsburges-augsburg.de () |
Room: | 3032 (N) |
Address: | Universitätsstraße 6a, 86159 Augsburg |
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Public key | haas.asc |
Publications
2022 |
Rico Amslinger, Christian Piatka, Florian Haas, Sebastian Weis, Theo Ungerer and Sebastian Altmeyer. 2022. Multiversioning hardware transactional memory for fail-operational multithreaded applications. Reports / Technische Berichte der Fakultät für Angewandte Informatik der Universität Augsburg 2022-01. Institut für Informatik, Universität Augsburg, Augsburg. |
2020 |
Rico Amslinger, Christian Piatka, Florian Haas, Sebastian Weis, Theo Ungerer and Sebastian Altmeyer. 2020. Hardware multiversioning for fail-operational multithreaded applications. In Miguel Areias, Jorge Barbosa and Inês Dutra (Ed.). 2020 IEEE 32nd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 9-11 Sept. 2020, Porto, Portugal. IEEE, Piscataway, NJ, 20-27. DOI: 10.1109/sbac-pad49847.2020.00014 |
Christian Piatka, Rico Amslinger, Florian Haas, Sebastian Weis, Sebastian Altmeyer and Theo Ungerer. 2020. Investigating transactional memory for high performance embedded systems. Lecture Notes in Computer Science 12155, 97-108. DOI: 10.1007/978-3-030-52794-5_8 |
2019 |
Christoph Kühbacher, Christian Mellwig, Florian Haas and Theo Ungerer. 2019. A functional programming model for embedded dataflow applications. In Vladimir Getov, Jean-Luc Gaudiot, Nariyoshi Yamai, Stelvio Cimato, Morris Chang, Yuuichi Teranishi, Ji-Jiang Yang, Hong Va Leong, Hossian Shahriar, Michiharu Takemoto, Dave Towey, Hiroki Takakura, Atilla Elci, Susumu Takeuchi and Satish Puri (Ed.). 2019 IEEE 43rd Annual Computer Software and Applications Conference (COMPSAC), 15-19 Jul 2019, Milwaukee, WI, USA. IEEE, Piscataway, NJ, 646-651. DOI: 10.1109/compsac.2019.10281 |
Florian Haas. 2019. Fault-tolerant Execution of Parallel Applications on x86 Multi-core Processors with Hardware Transactional Memory. Dissertation, Universität Augsburg. . |
2018 |
Rico Amslinger, Sebastian Weis, Christian Piatka, Florian Haas and Theo Ungerer. 2018. Redundant execution on heterogeneous multi-cores utilizing transactional memory. Lecture Notes in Computer Science 10793, 155-167. DOI: 10.1007/978-3-319-77610-1_12 |
2017 |
Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam and Youfeng Wu. 2017. Fault-tolerant execution on COTS multi-core processors with hardware transactional memory support. Lecture Notes in Computer Science 10172, 16-30. DOI: 10.1007/978-3-319-54999-6_2 |
2016 |
Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam and Youfeng Wu. 2016. POSTER: fault-tolerant execution on COTS multi-core processors with hardware transactional memory support. In Ayal Zaks, Bilha Mendelson, Lawrence Rauchwerger and Wen-mei W. Hwu (Ed.). Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16, Haifa, Israel, September 11 - 15, 2016. ACM Press, New York, NY, 421-422. DOI: 10.1145/2967938.2974051 |
2014 |
Florian Kluge, Mike Gerdes, Florian Haas and Theo Ungerer. 2014. A generic timing model for cyber-physical systems. In Workshop on Reconciling Predictability and Performance (RePP'14). , 1-15 DOI: 10.13140/2.1.1820.4165 |
Florian Haas, Stefan Metzlaff, Sebastian Weis and Theo Ungerer. 2014. Enhancing real-time behaviour of parallel applications using Intel TSX. In Proceedings of the Joint Euro-TM/MEDIAN Workshop on Dependable Multicore and Transactional Memory Systems (DMTM). , 1-2 |
Florian Haas, Sebastian Weis, Stefan Metzlaff and Theo Ungerer. 2014. Exploiting Intel TSX for fault-tolerant execution in safety-critical systems. In International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 1-3 Oct. 2014, Amsterdam, Netherlands. IEEE, Los Alamitos, Calif. [u.a.], 197-202. DOI: 10.1109/dft.2014.6962083 |
2013 |
Florian Kluge, Florian Haas, Mike Gerdes and Theo Ungerer. 2013. History-cognisant time-utility-functions for scheduling overloaded real-time control systems. In Sofia Antipolis (Ed.). Proceedings of 7th Junior Researcher Workshop on Real-Time Computing (JRWRTC 2013). , 1-4 DOI: 10.13140/2.1.1080.0648 |